Synchronous Dynamic Random Access Memory

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SDRAM is a type of DRAM that can pipeline memory accesses. In other words, your CPU can request a memory bit at a given address, and then request another bit somewhere else without waiting for the first bit to be returned.

For example, suppose the latency on a single memory read was10 seconds. With pipelining, you can request 10 different memory addresses before dealing with the result from the first request. It would take 10 seconds to get the result from the first read, but only 1 second for each additional read, since you’ve got some in the pipeline at that point.



References:
www.en.wikipedia.org
www.computer.howstuffworks.com
www.about.com

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